Block Diagram Descriptions

CPU: The CPU is an Alpha 21264 processor with the following features.
  • 500 MHz, 667 MHz, or 750 MHz operating frequency, depending on model
  • DVD Encode in realtime
  • Pipeline organization
  • Four instructions mapped per cycle
    • Out-of order execution
    • Quad integer execution
    • Dual floating-point execution
  • Motion video instructions
  • Tournament predictor
  • Dynamic JSR/JMP predictor
  • 64 KB I-cache -- 2-set
  • 64 KB D-cache -- 2-way set associative
  • CMOS6 -- 0.35u, 2.0V, 6LM
  • Four Major Interfaces:
    • Bcache Interface
      Supports external data and tag stores; data path 128 bits (16 bytes)wide, 16 bits of ECC. Tag size is 14 bits of address, 4 bits of control (including parity bits). The Alpha 21264 processor cache line is 64 bytes.
    • System Interface
      • Bidirectional SysData bus
      • Unidirectional SysAddOut bus
      • Unidirectional SysAddIn bus
    • Clock Interface
      • Internal PLL
    • SROM Interface
Bcache: The Compaq AlphaStation XP1000 supports 4MB of Bcache using RISC-style burst, Late-Write Synchronous SRAMs. The Bcache clock rate is a multiple of the CPU internal clock (1.5, 2, 2.5,....up to 8). The Bcache clock is currently running at 222 MHz.
SysData bus: Bi-directional, 64 bits wide, ECC, 2.6 GB per second; uses forward clocking in either direction.
SysAddIN and SysAddOUT: These busses send packets into and out from the cpu from the c-chip. Each bus is 13 bits wide.
C-Chip: The C-Chip is the control chip of the Tsunami Core Logic Chipset; it interfaces with the cpu, main memory, and the I/O subsystem.
D-Chips: D-Chips are the data chips of the Tsunami Core Logic Chipset. There are 4 D-Chips in the Compaq AlphaStation XP1000. They interface with the the Memory Data Bus, the SysData Bus and the I/O Subsystem Data Bus.
SROM: The SROM reads a serial bit stream of initialization information and code after the power-up reset. It also communicates with a serial port as a backdoor console.
Memory DIMMs: The Compaq AlphaStation XP1000 supports JEDC 21-C and PC100 SDRAM memory at 83.33 MHz. The SDRAMs are mounted on up to 8 168-pin JEDC standard DIMMs. The DIMMs are organized into two banks of four identical DIMMs per bank.
P-Chips: The P-Chips are the PCI interface chips of the Tsunami Core Logic Chipset. There are two 33 MHz P-Chips:
  • P-Chip 0 supports the 64-bit Primary PCI Bus
  • P-Chip 1 supports the 32-bit Secondary PCI Bus
TIG Bus: The TIG bus is an asynchronous 8-bit wide private interconnect controlled by the C-Chip with programmable timing that performs the following functions:
  • Interrupt posting
  • FlashROM access
  • General purpose I/O Register access
  • LEDs
Memory Bus: The Memory Bus is a 256-bit, 83 MHz interface with quadword ECC.
PCI 1 Interface Bus - Primary: 32 bits wide and operates at 33 MHz.
Qlogic UltraSCSI: PCI-based UltraSCSI interface chip for up to 4 internal devices, not including the controller.
Ethernet: The 10/100 Mbps Fast Ethernet LAN controller (21143) is attached to the primary PCI bus. External access is provided through a 10/100BaseT connector at the rear of the enclosure, or through a media adapter unit (MAU) for Twisted-Pair(10BASET) and ThinWire (10BASE2) 10-Mbps operation.
P2P Bridge: The 21152 32-bit P2P bridge provides all clocking, setting, and arbitration for the PCI 1 Secondary bus
PCI 1 Interface Bus - Secondary: 32 bits wide and operates at 33 MHz.
PCI 0 Interface Bus: This bus is 64 bits wide and operates at 33 MHz.
Cypress: The Cypress Bridge Chip performs the following tasks.
  • Legacy ISA bus
  • Keyboard/Mouse controller
  • Real-Time-Clock
  • Interrupt controller
  • Enhanced IDE controller
  • USB interface
  • Power management
IDE: 16.67 MB; maximum of two IDE devices.
PCI Slot 1: 64-bit PCI, full-size slot.
PCI Slot 2: 32-bit PCI, full-size slot.
PCI Slot 3: 64-bit PCI, full-size slot.
PCI Slot 4: 32-bit PCI slot (physically shared with ISA on the rear of the enclosure).
PCI Slot 5: 32-bit PCI, full-size slot.
ISA Bus: Interface between the Cypress Bridge Chip and the ISA Slot.
ISA Slot: Supported by the ISA Bus, physically shares Slot 4 on the rear of the enclosure with PCI Slot 4.
Super I/O: The FDC37C669 Super I/O Chip supports the Parallel Port, the two Serial Ports (COM1 and COM2) and the 1.44 MB diskette drive.
Audio: ISA based ESS Technology ES1887 chip that records and plays back voice, sound, and music.
  • 2 DMA channels; full duplex with simultaneous playback and record
  • Supports Sound Blaster MIDI interface
  • 16-bit volume control
  • Stereo